chipsalliance / chipsalliance/chisel
Update logging to have name of design in "Elaborating design..."
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
**Type of issue**: feature request
**Impact**: no functional change
**Development Phase**: request | proposal
**What is the current behavior?**
Logging outputs a progress message without name of design beeing elaborated.
```[info] [0.000] Elaborating design...```
**What is the expected behavior?**
Can we have the name of the design being elaborated, like:
```[info] [0.000] Elaborating ThingAMaBob...```
This can make tracing through logs a lot more pleasant. For instance, I discovered that chisel-testers2 does elaboration twice for Verilator, which would be a lot more evident if the logging specified which design is being elaborated.
Contributor guide
Research direction
The issue names no file, test, or entry point. Search the repository for the exact "Elaborating design..." log message, then trace how the design name is available during elaboration; done means the progress message includes that name without changing functionality.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- developer-experience
- Issue type
- Feature
- Difficulty
- 2/5
- Estimated time
- 1-3 hours
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 38/100