chipsalliance / chipsalliance/chisel
Better error message for Vec mono-connected to Seq
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- Dominant language
- Scala
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Description
As discussed here: https://groups.google.com/forum/#!topic/chisel-users/dR5KO-9yZec
https://github.com/freechipsproject/chisel3/pull/739 only fixed this for bulk connect
**Type of issue**: bug report
**Impact**: no functional change
**Development Phase**: request
**Other information**
**If the current behavior is a bug, please provide the steps to reproduce the problem:**
**What is the current behavior?**
**What is the expected behavior?**
**Please tell us about your environment:**
**What is the use case for changing the behavior?**
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