chipsalliance / chipsalliance/chisel
Add stacked source locators
Open
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
**Type of issue**: feature request
**Impact**: unknown
**Development Phase**: request
**Other information**
When looking at generated verilog, we see the leaf level source file such as Mux.scala. We instead need to see a stack trace of sources for this feature to be more helpful.
**Please tell us about your environment:**
Ubuntu
**What is the use case for changing the behavior?**
Faster manual debug
Contributor guide
Assessment
This issue has not been assessed yet.