chipsalliance / chipsalliance/chisel
TopWiring API
Open
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
**Type of issue**: feature request
**Impact**: API addition (no impact on existing code)
**Development Phase**: request
**What is the use case for changing the behavior?**
`TopWiringAnnotation` has been around for a while, but there is not Chisel-level API. It would be good to think about adding this in. The API for this can likely be pretty simple. Something like:
```scala
class Foo extends RawModule {
val bar = RegInit(0.U(1.W))
BoringUtils.shaft(bar)
}
```
Bikeshedding the method name:
- `topWire`
- `boreUp`
- `boreTop`
- `chimney`
- `shaft`
- `boreShaft`
- `mineShaft`
- `debug`
- `via`
Contributor guide
Assessment
This issue has not been assessed yet.