Investigate better bitpacking for Operand and Use

Two core data-structure elements, `Operand` and `Use`, are both designed to fit a relatively large amount of information in one `u32`. This is a performance optimization that we have found to be relatively impactful; expanding even to a `u64` has a measurable impact (of at least a few percent) on compilation time.

Unfortunately, the scarcity of bits means that certain limits are lower than we would prefer. For example, we support only a 5-bit index for physical registers in each register class (so 32 integer registers and 32 float/vector registers), which may not be enough for some use-cases (though it can work for aarch64 and x64 at least). This also limits the VReg count to 1M (2^20).

We should investigate ways of, e.g., out-of-lining infrequently-used information (such as fixed-PReg constraints) to raise the limits on VRegs, PRegs, instruction count, and the like and provide enough headroom for any reasonably-imaginable use case.

Inizia individuando le definizioni e le disposizioni dei bit di Operand e Use, quindi traccia il modo in cui i loro campi u32 codificano le informazioni relative a registri, registri virtuali, istruzioni e vincoli. Misura i limiti attuali e l’impatto sui tempi di compilazione prima di valutare se le informazioni utilizzate raramente possano essere memorizzate fuori linea. Done deve includere una progettazione concreta che aumenti i limiti rilevanti senza ampliare la rappresentazione comune.

Scritto dal modello di indicizzazione a partire dal testo della issue.