Revisit cache line size constants

Currently, we use CAF_CACHE_LINE_SIZE with the value of 64 bytes to prevent false sharing in the `actor_control_block` and `default_mailbox`.

Intel and AMD use 64, but Apple Silicone switched to 128 bytes with the M-series processors. However, research suggests that internally, the cache line size is still 64 bytes, although reported as 128.

>Regarding cache-line size, sysctl on macOS reports a value of 128 B, while getconf and the CTR_EL0 register on Asahi Linux returns 64 B, which is also supported by our measurements. [[1]](https://www.sciencedirect.com/science/article/pii/S1383762124000390)

>While getting the cacheline size via software gives us 128 bytes, I think physically it is actually 64 bytes. In this benchmark even if you change the alignment to 64, the performance remains exactly the same. [[2]](https://abhikja.in/blog/2025-12-07-get-in-line/)

The research lowers the priority of this task, but we should handle it properly. Here are some suggestions how to do it:

- a CMake generated constant in build_config,
- use the [std library](https://en.cppreference.com/w/cpp/thread/hardware_destructive_interference_size.html),
- use fixed 128 bytes