Remove REG_WIDTH from AxiTop

AxiTop has an unused REG_WIDTH generic.

This should be removed, since this width is hard coded in the generation output for the same reasons as #243 and can only be changed using the `--mmio64` Fletchgen flag.

Removing this is easy but has implications for all supported platforms, where the change should be reflected

Locate the AxiTop entity in the VHDL source code, identify the REG_WIDTH generic parameter, and remove it. Verify the change compiles across all supported platforms listed in the project documentation. Check for any testbenches or example designs that instantiate AxiTop and update them accordingly.

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