abs-tudelft / abs-tudelft/fletcher

Wrap AxiTop into an AxiTopSim for simulation

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#135 0 comentarios 0 reacciones 0 asignados Ver en GitHub
enhancement fletchgen
Lenguaje dominante
VHDL
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235
Forks
30
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Descripción

Currently the AXI top-level output of Fletchgen using --axi doesn't provide a simulation like the simulation top-level that it can generate using the --sim flag.

It would be nice to just wrapception the AXI top into a simulation top level, so the same simulation capabilities of the normal simulation top-level become available to the AXI top-level as well, testing the AXI top-level itself in the meanwhile for all different codegen tests.

This would also enable the possibility of adding a protocol checker on the axi-simulation top level.

Alternatively we could just make the simulation top-level always instantiate the AXI top wrapper.

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