MIPS32 DSP instructions not lifted

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Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
35/100
Issue type
Bug
Clarity
Mostly clear
Activity status
Stale
Tech stack
cpp
Domain
reverse-engineering

Research direction

Start by locating the MIPS DSP instruction-lifting implementation and reproduce the issue with code or binaries containing LBUX, LHX, and LWX. The work is done when these indexed loads are recognized as register-sum memory accesses instead of undefined instructions, allowing analysis to continue.

Written by the indexing model from the issue text.

Description

Arch: MIPS Component: Architecture Effort: Medium Impact: Medium Lifting

MIPS5 (and 4?) have optional DSP instructions. As is typical of DSP instruction sets, there's lots of them, most of which are rare outside actual DSP code. However, some compilers appear to frequently generate DSP instructions for normal, pure-integer C code. BN hits these during analysis, believes they're undefined, and terminates the function there.

The culprits here appear to be the "load byte/hword/word indexed" instructions (LBUX, LHX, LWX)- which just load from an address calculated as the sum of two registers (i.e. foo = mem.d[bar+baz];).

Dominant language
C++
Stars
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Forks
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Avg merge
5d 5h
Merged PRs (30d)
19

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