Implement SIMD where applicable
Nobody has claimed this yet.
Assessment
- Difficulty
- 5/5
- Estimated time
- Over a week
- Newbie friendliness
- 25/100
- Issue type
- Feature
- Clarity
- Needs clarification
- Activity status
- Stale
- Tech stack
- rust
- Domain
- cryptography
Research direction
Start by reading the key-generation path described in the update, especially num-bigint/src/bigrand.rs lines 324-371, and compare the feature-flag approach referenced from aes_gcm. The issue does not define which operations to vectorize or an acceptance test, so completion would require establishing the SIMD scope, portability behavior, and performance criteria first.
Written by the indexing model from the issue text.
Description
What got me looking into this was the somewhat slow key generation and the related issue #29. A solution or rather, improvement would be to implement SIMD, Single Instruction Multiple Data. I found a paper by freescale semiconductor on this topic here: http://application-notes.digchip.com/314/314-66328.pdf.
Since all processors do not support the AVX/SSE/SIMD family of instructions, this would have to be implemented under a feature flag or as in the case of aes_gcm, the feature is enabled when the compiler is passed these flags:
RUSTFLAGS="-Ctarget-cpu=sandybridge -Ctarget-feature=+aes,+sse2,+sse4.1,+ssse3"
Update: What takes time during key generation is finding big primes, and that is done here: https://github.com/dignifiedquire/num-bigint/blob/master/src/bigrand.rs#L324-L371
I might take a deeper look at this when my exams are over.
- Dominant language
- Rust
- Stars
- 673
- Forks
- 190
- PR merge metrics
- No merged PRs in 30d
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
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