OpenXiangShan / OpenXiangShan/ChiselAIA

MSI接口形式,建议从AXI4-LITE改成AXI4接口形式

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Dominant language
Scala
Stars
13
Forks
7
PR merge metrics
No merged PRs in 30d

Description

经分析,并客户也反馈:
由于cmn协议的master对接口,不支持AXI4-Lite协议,并且像PCIE等设备误发出burstlen超过1个的时候,IMSIC会发出多个response,导致总线挂死行为,对于集成或功能上,都不灵活,建议将访问接口改为AXI4,以便更灵活处理。

Contributor guide

No contributing guide indexed for this repository

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating the IMSIC access interface and the current AXI4-Lite connection to the cmn master. Review how burst lengths and responses are handled, then verify that the interface accepts AXI4 transactions, including bursts longer than one, without multiple responses causing the bus to hang.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
embedded-iot
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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