Implement NPU Hardware Dispatch Lowering for `vx.spawn`

Currently, vx.spawn for topology 100 (NPUHBM) is implemented as a placeholder in VxLowering.cpp which sequentially inlines the block without any threading or dispatch.

Tasks:

1. Update SpawnOpLowering in VxLowering.cpp for topology 100.
2. Convert the spawn region into an outlined MLIR func.func.
3. Emit an MLIR llvm.call or func.call targeting the npu_dispatch AMX Objective-C++ runtime function.
4. Pass any captured variables as arguments to the outlined NPU kernel function.
5. Provide tests ensuring NPU dispatch works correctly on Apple Silicon.

Start in VxLowering.cpp at SpawnOpLowering and inspect the topology 100 placeholder path. Trace how the spawn region is lowered, then define tests for outlined NPU dispatch on Apple Silicon. Done means captured variables reach the outlined function and the AMX npu_dispatch runtime is invoked instead of sequential inlining.