tile-ai / tile-ai/tilelang

[Feature Request] Flexible support for tcgen05 ld/st

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enhancement
Dominant language
Python
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Merged PRs (30d)
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Description

Required prerequisites
  • I have searched the Issue Tracker that this hasn't already been reported. (comment there if it has.)
Motivation
  1. Support lowering to tcgen05_ld 16dpxxxlanes, according to target fragment layout.
  2. Currently requires tcgen05_ld/st thread extents exactlly equal 128. However there may be multiple consumer warpgroups. Hence, we may only require the thread extent to be aligned with 128.
Solution

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Alternatives

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Additional context

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Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating the tcgen05_ld/st lowering entry points and the target fragment layout handling. Confirm how 16dpxxxlanes is represented and how thread extents are validated; done means aligned extents support multiple consumer warpgroups without breaking existing lowering.

Written by the indexing model from the issue text.

Assessment

Domain
backend, compilers
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Quiet
Clarity
Needs clarification
Newbie friendliness
35/100

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