sipeed / sipeed/TangMega-138K-example
dvp_rgb example
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- Dominant language
- Verilog
- Stars
- 82
- Forks
- 21
- PR merge metrics
- No merged PRs in 30d
Description
There is a problem with the example for the camera with the screen, when loading the pre-synthesized example on the fpga, the incorrect image is displayed on the screen. What could have gone wrong?
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by loading the pre-synthesized camera-with-screen example on the FPGA and compare the displayed image with the attached report. Trace the example's camera-to-screen behavior to identify why the incorrect image appears; done means the expected image displays correctly and the cause is documented.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100