Convert branch instruction to use absolute addressing

RiscV uses relative addressing for branches like BLTU. That means to get the absolute target address of a branch, you need to add the relative target address specified in the instruction to the address of the instruction itself.

That's a u32 addition, ie we need to handle wrap-around.

Luckily, all the relevant information is known statically, so we can handle this computation at 'setup' time instead of at runtime, saving us a few u32 range checks.

This might be a good first issue for newcomers. Have a look at the structure InsnRecord and perhaps go from there. Also consider implementing the same feature in the emulator to keep the two parts of the system in sync.

If you are in the swing of things, you can look into doing the same change for unconditional jump.

Start by reading the InsnRecord structure and trace how branch targets are represented during setup. Update the branch target handling so u32 wrap-around is accounted for and the emulator remains in sync; if the scope is extended, apply the same approach to unconditional jumps.