Pm1ControlRegisterBlock::set_sleep_typ doesn't write SLP_TYPb

From the spec:

OSPM writes SLP_TYPb (from the _S5 object) with the SLP_ENb bit set to the PM1b_CNT register, or writes the HW-reduced ACPI Sleep Type value for S5 and the SLP_EN bit to the Sleep Control Register.

The current behavior is that the same value is written to both SLP_TYPa and SLP_TYPb.

My recommended solution is to remove the set_sleep_typ method and instead create a function called enter_soft_off (can also have functions for sleep, although my OS is not at the point where I can implement sleep). This function can do the proper procedure, including checking if it is HW reduced and doing the right steps for HW reduced. I can make a PR with this, but currently my test devices (QEMU q35 and Lenovo Z560 both are not HW reduced, so I can't test the HW reduced logic).

Start at Pm1ControlRegisterBlock::set_sleep_typ and compare its PM1a/PM1b writes with the linked ACPI specification. Determine the API and test coverage needed for separate non-HW-reduced writes and HW-reduced handling; done means the implementation follows the S5 procedure without assuming both registers use the same value.