`reorder_impl_items` adds empty line between single-line macros

We have some macros that we use inside impl statements that look like this:

impl Value {
    impl_value!(as_i64, from_i64, data_i64, as_data_i64, i64, Int64);
    impl_value!(as_f32, from_f32, data_f32, as_data_f32, f32, Float32);
    impl_value!(as_vec2, from_vec2, data_vec2, as_data_vec2, [f32; 2], Vec2);
    impl_value!(as_vec3, from_vec3, data_vec3, as_data_vec3, [f32; 3], Vec3);
    impl_value!(as_vec4, from_vec4, data_vec4, as_data_vec4, [f32; 4], Vec4);
    impl_value!(as_quat, from_quat, data_quat, as_data_quat, [f32; 4], Quat);

that when formatting with reorder_impl_items=true gets rearranged to have a new empty line between them:

impl Value {
    impl_value!(as_i64, from_i64, data_i64, as_data_i64, i64, Int64);

    impl_value!(as_f32, from_f32, data_f32, as_data_f32, f32, Float32);

    impl_value!(as_vec2, from_vec2, data_vec2, as_data_vec2, [f32; 2], Vec2);

    impl_value!(as_vec3, from_vec3, data_vec3, as_data_vec3, [f32; 3], Vec3);

    impl_value!(as_vec4, from_vec4, data_vec4, as_data_vec4, [f32; 4], Vec4);

    impl_value!(as_quat, from_quat, data_quat, as_data_quat, [f32; 4], Quat);

Which is a bit more verbose. Should/could this option skip macros inside impl statements or maybe specifically skip single-line macros? That would be nice!

Not sure how how common this pattern is but we do use it for some types. We could potentially move the macro out of the impl statement, could be a bit more standard but do quite like that this location is clear that it just adds implementation.

Start by reproducing the reported Rust example with reorder_impl_items=true, focusing on how single-line macros inside impl statements are reordered. The change is done when formatting no longer inserts empty lines between these macros, while the existing reordering behavior remains intact.