x86 softfloat target: no way to get LLVM to make local use of the FPU or SIMD registers

Some softfloat targets are used in environments where an FPU and SIMD registers are present, but should not be used by default -- in particular, this is fairly common in kernels. It should be possible to still locally enable the use of these CPU features; this just adds a precondition to the function to make FPU and SIMD ready for use by the kernel before invoking this code.

This works fine on arm-32 by picking a softfloat ABI (i.e., a *eabi target) and then enabling the right target features on a function-by-function basis. However, for x86 (32bit and 64bit), this does not work: there is no dedicated ABI flag supported by LLVM here; instead, our soft-float targets work by setting target features to something like -x87,-mmx,-sse,+soft-float. When both the soft-float and the sse2 target feature are set, soft-float takes priority (example). We cannot let people disable soft-float on a per-function basis as that would change the ABI.

Ultimately this is caused by the fact that LLVM doesn't have a proper float ABI designation for x86; instead, the float ABI is inferred from target features such as soft-float. If we could set the float ABI directly like we can on arm-32, we could let people disable soft-float on a per-function basis (probably via a hard-float target feature, no need to make this a negative feature) and thus LLVM could generate code making proper use of the FPU.

Cc @nikic @workingjubilee @briansmith

Start by reviewing the x86 soft-float target-feature handling described in the issue and compare it with the arm-32 *eabi behavior. Investigate how LLVM infers the x86 float ABI and how per-function features interact with soft-float. Done means local FPU and SIMD use can be enabled without changing the target ABI.