Some `-Ctarget-feature`s must be restrained on RISCV
Nobody has claimed this yet.
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- Rust
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Description
refs:
- https://github.com/rust-lang/rust/issues/114544
- https://github.com/rust-lang/rust/pull/116485 which was massively scaled back due to this open question
- https://github.com/rust-lang/rust/issues/116344
- https://github.com/rust-lang/rust/pull/129884
- https://github.com/rust-lang/rust/issues/131799
- https://github.com/rust-lang/rust/pull/131807
in discussion of the target modifiers RFC^1, Ralf asks this question:
That's actually fine on most targets, e.g. on x86 if you set the soft-float target feature then you can enable x87 and SSE and whatnot and keep using the soft-float ABI. Only aarch64 https://github.com/llvm/llvm-project/issues/110632 (from the targets I checked so far).
The interesting question is what happens on RISC-V when I disable the FP instructions on a target that usually uses the hardfloat ABI. Sadly, what LLVM usually does in that case is silently fall back to the softfloat ABI. But I haven't checked for RISC-V.
cc @beetrees
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with RFC 3716 and the linked Rust issues and pull requests, especially the discussion of RISC-V floating-point features and ABI behavior. Determine which -Ctarget-feature combinations require restriction and what compiler behavior should be accepted; the issue is done when that behavior is resolved and verified.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- rust
- Domain
- compilers
- Issue type
- Bug
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Quiet
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100