rust-embedded / rust-embedded/riscv
bare metal programs on RISC-V SoCs with heterogeneous harts
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- Dominant language
- Rust
- Stars
- 1.1k
- Forks
- 200
- Avg merge
- 11d 2h
- Merged PRs (30d)
- 2
Description
riscv-rt enables the FPU if either the riscvf or riscvd features are present at compile time:
https://github.com/rust-embedded/riscv/blob/master/riscv-rt/src/asm.rs#L176-L190
Is there a way to build a single bare metal binary that can safely run on a SoC with heterogeneous harts? For example, the SiFive HiFive Unmatched board's SoC has four U740 harts with an FPU and one S71 hart without an FPU. If I use a riscv64gc toolchain to build a bare metal program for this SoC, I know I can keep the S71 hart from running any of the init code by defining a custom _mp_hook function that holds that hart in a wfi loop. But then I can't do anything with the S71 hart.
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with riscv-rt/src/asm.rs lines 176-190 and the custom _mp_hook behavior described in the issue. Investigate how compile-time riscvf/riscvd feature handling interacts with heterogeneous harts on the HiFive Unmatched. Done means establishing and documenting a safe single-binary approach, or clearly defining the required change if one is needed.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- rust
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Active
- Clarity
- Mostly clear
- Newbie friendliness
- 42/100