spi: interdependent operations/operations sharing data
Nobody has claimed this yet.
Assessment
- Difficulty
- 5/5
- Estimated time
- Over a week
- Newbie friendliness
- 35/100
- Issue type
- Feature
- Clarity
- Mostly clear
- Activity status
- Stale
- Tech stack
- rust
- Domain
- embedded-iot
Research direction
Start by locating the Operation enum and the spi_device.transaction API referenced in the issue. Determine how a transaction could let a read buffer be reused by a later write while chip select remains asserted; done means the stated read-then-write use case is supported without altering the active bits.
Written by the indexing model from the issue text.
Description
There is currently no support for SPI operations (in a transaction slice) to mutably share data.
Use case: SPI devices often implement the following behavior (happy to provide numerous examples if this is in doubt) to implement an atomic update of several bits.
- Load "active" bits into the SPI shift register (that sits between SDI and SDO) on CS assertion.
- Load new bits from shift register into "active" register on CS deassertion.
The intention is to implement a read of the active bits without altering them (not even a transient alteration).
The approach would be to keep CS asserted accross a transaction of reading and writing the same values again.
let mut bits = [0; 4];
spi_device.transaction(&mut [Operation::Read(&mut bits), Operation::Write(&bits)]);
This is currently not possible with the Operation enum.
- Dominant language
- Rust
- Stars
- 2.7k
- Forks
- 282
- PR merge metrics
- No merged PRs in 30d
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
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