rust-embedded / rust-embedded/cortex-m

SCB.ICSR.VECTACTIVE is RES0 on armv8m-baseline w/o halting debug

Open
#456 0 comments 0 reactions 0 assignees View on GitHub

Nobody has claimed this yet.

O-Armv8-M
Dominant language
Rust
Stars
1k
Forks
202
Avg merge
6d 2h
Merged PRs (30d)
2

Description

I know it's a weird combo (no halting debug is rare), but if we read this from IPSR instead of ICSR we avoid the problem altogether.

https://github.com/rust-embedded/cortex-m/blob/1a215916eeebdf96d4530e0afb1baa91b93eefb7/cortex-m-rt/macros/src/lib.rs#L227

Contributor guide

No contributing guide indexed for this repository

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start in macros/src/lib.rs around line 227, where the issue identifies the status read. Compare the current ICSR source with the proposed IPSR source and verify the behavior for armv8m-baseline without halting debug. Done means the problematic read no longer relies on the RES0 ICSR field and the project still builds successfully.

Written by the indexing model from the issue text.

Assessment

Tech stack
rust
Domain
embedded-iot
Issue type
Bug
Difficulty
3/5
Estimated time
1-2 days
Activity status
Stale
Clarity
Clearly specified
Newbie friendliness
38/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.