Pixel valve driving DSI1 appears restricted to a max HFP of 255

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Since Jun 23, 2025.

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Description

Describe the bug

Logged from https://forums.raspberrypi.com/viewtopic.php?p=2315116#p2315116

Waveshare 13.3" DSI display in 4 lane mode ends up asking a CM4 for a PV timing with horizontal front porch of 320. The resulting timing appears to be an HFP of 64 (320 & 0xff).

PV feeding HDMI or DPI outputs are quite happy to take HFP > 255.
There are a couple of other PV register bits that are set differently for DSI to the others, but none immediately scream that they are a limitation.

Steps to reproduce the behaviour

dtoverlay=vc4-kms-dsi-waveshare-panel,13_3inch_4lane

kmstest --flip will report a refresh rate of 66.7Hz instead of 60Hz.
DSI analyser agrees.

Device (s)

Raspberry Pi CM4, Raspberry Pi CM4 Lite

System

Raspberry Pi OS with 6.12.33 kernel.

Logs

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Additional context

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