CORTEX_M: Target configuration

CMSIS-NN requires slightly different lowerings for different architecture extensions (scalar/DSP/vector). Currently
vector extension is assumed, so we might need to add a way to configure this and do modifications in the pass lowering where required.

For example, the linear operator currently only pass the kernel_sum scratch buffer and no bias to the operator call, which only works for the MVE implementation of the operator. To run this on another Cortex-M would involve passing the target CPU to the ConvertToCortexMPass which lowers the operator and add the bias as an argument if it does not have MVE support.

Alternatively, it might not be worth the effort to do this in the lowering and it is better to do the target configuration in the runtime flow only, then the scratch buffer would need to be computed in the runtime. This decision of how to best do this is part of the ticket.