pytorch / pytorch/cpuinfo

AMD Zen 1 support broken

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bug
Dominant language
C
Stars
1.2k
Forks
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PR merge metrics
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Description

It thinks there's 1 L3 cache when there's 2, and 1 cluster when there should be 2. Tested on a Ryzen 5 1600 non-AF. If you need more info I'm more than happy to run any code and return the results.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by reproducing the report on a Ryzen 5 1600 non-AF and inspect the CPU topology and cache-detection paths for AMD Zen 1. Use the reported expected values—two L3 caches and two clusters—as the completion criteria, and validate the results on the affected processor.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
devtools
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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