pytorch / pytorch/cpuinfo

Add: RISC-V support

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#124 4 comments 1 reaction 0 assignees View on GitHub

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enhancement
Dominant language
C
Stars
1.2k
Forks
409
PR merge metrics
No merged PRs in 30d

Description

Especially RISC-V64.

There is some expectation of adding support for the new RISCV architecture, even though it is an emulated environment for example QEMU.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by reviewing the cpuinfo repository's existing architecture support and identify the entry points needed for RISC-V64, including the QEMU-emulated case mentioned in the issue. Done means the library recognizes and reports RISC-V and RISC-V64 consistently with its existing supported architectures, with appropriate coverage added where the repository's current tests require it.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
operating-systems
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
20/100

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