pyOCD race condition bugs in write_core_registers_raw and read_core_registers_raw

Quoting: https://github.com/mbedmicro/pyOCD/blob/master/pyocd/coresight/cortex_m.py

        # Technically, we need to poll S_REGRDY in DHCSR here before reading DCRDR. But
        # we're running so slow compared to the target that it's not necessary.
        # Read it and assert that S_REGRDY is set

Technically, this is a bug. And it bit me. :(

This is no longer "technically" true. 5 years of computer improvements makes this statement now false. I had to check the S_REGRDY or my probe smashed the register by executing another write too quickly and then failed the assert on the callbacks.

These comments are in the functions write_core_registers_raw and read_core_registers_raw.

I added a read to validate the S_REGRDY, but this seems like a duct tape patch. And it sort of conflicts with the whole read callback thing, so I'm kind of reluctant to submit a patch given that I really don't understand how to do this immediately and then with the callbacks in a way that isn't redundant.

Edit: Looks like I'm not the only one to see this:
https://github.com/mbedmicro/pyOCD/issues/693

Start in pyocd/coresight/cortex_m.py and inspect write_core_registers_raw and read_core_registers_raw, including their S_REGRDY comments and read callbacks. Read the related issue #693 for prior context. Done means the register accesses no longer race with the target and the callback behavior remains correct without assertion failures.