"reset" to nRF52840 does not reset everything

Reproduce the nRF52840 example using pyocd's reset command and compare it with the working openocd reset. Start from the reset and disconnect handling in pyocd, using SEGGER_SYSVIEW_Conf and the DWT CYCCNT setup in main as the observable case. Done means a pyocd reset leaves CYCCNT running without requiring the delay in main().

Currently playing around with Sysview...

After flashing the test program below via pyocd to a nRF52840 target, DWT->CYCCNT is initialized and running as expected.
After issuing a reset command via pyocd with the same firmware in flash, CYCCNT is not running.
Specifying the reset mode does not help.

Doing a reset with openocd, CYCCNT is running as expected.

Investigating a little bit further showed, that inserting a delay in main() before init of CYCCNT solves the problem.

Is order of init / disconnect wrong?

/**
 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <stdio.h>
#include <stdint.h>
#include <stdarg.h>
#include <string.h>

#include <unistd.h>
#include <fcntl.h>

//#include "SEGGER_RTT.h"
#include "SEGGER_SYSVIEW.h"



static void _Delay(int period)
{
    volatile int i = (100000 / 17) * period;
    do {
        ;
    } while (i--);
}   // _Delay



#define SYSVIEW_DEVICE_NAME "PCA10056 Cortex-M4"
#define SYSVIEW_APP_NAME "SysView Games"


/* DWT (Data Watchpoint and Trace) registers, only exists on ARM Cortex with a DWT unit */
#define KIN1_DWT_CONTROL             (*((volatile uint32_t*)0xE0001000))
  /*!< DWT Control register */
#define KIN1_DWT_CYCCNTENA_BIT       (1UL<<0)
  /*!< CYCCNTENA bit in DWT_CONTROL register */
#define KIN1_DWT_CYCCNT              (*((volatile uint32_t*)0xE0001004))
  /*!< DWT Cycle Counter register */
#define KIN1_DEMCR                   (*((volatile uint32_t*)0xE000EDFC))
  /*!< DEMCR: Debug Exception and Monitor Control Register */
#define KIN1_TRCENA_BIT              (1UL<<24)
  /*!< Trace enable bit in DEMCR register */


#define KIN1_InitCycleCounter()      KIN1_DEMCR |= KIN1_TRCENA_BIT
  /*!< TRCENA: Enable trace and debug block DEMCR (Debug Exception and Monitor Control Register */

#define KIN1_ResetCycleCounter()     KIN1_DWT_CYCCNT = 0
  /*!< Reset cycle counter */

#define KIN1_EnableCycleCounter()    KIN1_DWT_CONTROL |= KIN1_DWT_CYCCNTENA_BIT
  /*!< Enable cycle counter */

#define KIN1_DisableCycleCounter()   KIN1_DWT_CONTROL &= ~KIN1_DWT_CYCCNTENA_BIT
  /*!< Disable cycle counter */

#define KIN1_GetCycleCounter()       KIN1_DWT_CYCCNT
  /*!< Read cycle counter register */



static void _cbSendSystemDesc(void) {
    SEGGER_SYSVIEW_SendSysDesc("N=" SYSVIEW_APP_NAME ",D=" SYSVIEW_DEVICE_NAME ",O=None");
    SEGGER_SYSVIEW_SendSysDesc("I#15=SysTick");
}



void SEGGER_SYSVIEW_Conf(void)
{
    //SEGGER_RTT_Init();
    KIN1_InitCycleCounter();
    KIN1_ResetCycleCounter();
    KIN1_EnableCycleCounter();

    SEGGER_SYSVIEW_Init(64000000, 64000000, NULL, _cbSendSystemDesc);
    SEGGER_SYSVIEW_SetRAMBase(0x20000000);
}   // SEGGER_SYSVIEW_Conf



int main()
{
    //_Delay(200);                   // this delay is required to have a running CYCCNT after reset

    SEGGER_SYSVIEW_Conf();

    SEGGER_SYSVIEW_Start();
    SEGGER_SYSVIEW_EnableEvents(0xffff);
    _Delay(222);

    SEGGER_SYSVIEW_Error("Start\n");
    for (int i = 0;  i < 30;  ++i) {
        SEGGER_SYSVIEW_MarkStart(0x1111);
        SEGGER_SYSVIEW_MarkStart(0x3333);
        SEGGER_SYSVIEW_WarnfTarget("cyccnt %d %u\n", i, KIN1_GetCycleCounter());
        SEGGER_SYSVIEW_MarkStop(0x3333);
        SEGGER_SYSVIEW_MarkStart(0x2222);
        _Delay(87);
        SEGGER_SYSVIEW_MarkStop(0x2222);
        SEGGER_SYSVIEW_MarkStop(0x1111);
    }

    SEGGER_SYSVIEW_DisableEvents(0xffff);
    SEGGER_SYSVIEW_Print("Stop\n");
    SEGGER_SYSVIEW_Stop();

    for (;;) {

    }
}   // main