pc2 / pc2/sus-compiler

On-save regenerating of Verilog/VHDL files

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#30 0 comments 0 reactions 1 assignee View on GitHub

@IBims1NicerTobi is already working on this.

Since Jan 31, 2025.

enhancement good first issue
Dominant language
Rust
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126
Forks
6
PR merge metrics
No merged PRs in 30d

Description

This seems like a convenient feature. That the compiler in "deamon mode" watches a directory of SUS files, and whenever a file changes, update the generated verilog files.

This should alleviate the friction of using SUS in proprietary environments

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