oxidecomputer / oxidecomputer/quartz
FPGA META-DX2 management
Open
Nobody has claimed this yet.
- Dominant language
- VHDL
- Stars
- 22
- Forks
- 2
- Avg merge
- 9h 38m
- Merged PRs (30d)
- 1
Description
Kind of a catch all at the moment, this needs to get more properly scoped into workable chunks.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
The issue names FPGA META-DX2 management but provides no files, tests, or concrete behavior. First scope the catch-all into discrete, testable work items by identifying the relevant repository entry points; done means the work is replaced by clearly defined, workable chunks with explicit outcomes.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Active
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100