oxidecomputer / oxidecomputer/quartz

`IOSync::mkOutputFor` does not work for a `Wire`

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bsv compiler
Dominant language
VHDL
Stars
22
Forks
2
Avg merge
9h 38m
Merged PRs (30d)
1

Description

Error: "Clocks.bsv", line 1743, column 9: (G0005)
  The assertion `clock_crossing_rule' failed for rule
  `qsfp15_lpmode_clock_domain_crossing'
  because it has an implicit condition
  During elaboration of rule `clock_domain_crossing' at "Clocks.bsv", line
  1743, column 9.
  During elaboration of `qsfp15_lpmode' at
  "../hdl/boards/sidecar/qsfp_x32/QsfpX32ControllerTop.bsv", line 517, column
  24.
  During elaboration of `mkQsfpX32ControllerTop' at
  "../hdl/boards/sidecar/qsfp_x32/QsfpX32ControllerTop.bsv", line 233, column
  8.

The offending line here was something like:

qsfp15_lpmode = qsfps[15].lpmode;

Where qsfps[15].lpmode is a Wire driven by a Reg in a different module. Changing it to a RegU fixed the issue.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start at IOSync::mkOutputFor and reproduce the failure using the Clocks.bsv case described in the report, including the assignment from qsfps[15].lpmode. Compare how Wire and RegU outputs are handled during elaboration; done means the Wire case no longer triggers the implicit-condition assertion and does not require the reported workaround.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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