oxidecomputer / oxidecomputer/propolis
Overzealous limits on MMIO addressing
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- Dominant language
- Rust
- Stars
- 270
- Forks
- 42
- Avg merge
- 4d 5h
- Merged PRs (30d)
- 6
Description
The propolis library defines a pair of limits for sysmem (guest DRAM) and physmem (MMIO accesses):
https://github.com/oxidecomputer/propolis/blob/e2220ee6ea3920381c1eee22fc3752d1af81f5dd/lib/propolis/src/vmm/machine.rs#L14-L16
The physmem limit in particular poses a challenge for any PCI device which has its 64-bit BAR(s) placed at a physical address which exceeds it. This was found to be at least part of the problem when an illumos guest was unable to attach its nvme driver due to failed accesses to the nvme registers held in a 64-bit BAR placed above the physmem limit.
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start in lib/propolis/src/vmm/machine.rs at the sysmem and physmem limits linked in the issue. Investigate how MMIO accesses to 64-bit PCI BARs are bounded, using the illumos guest's failed NVMe register accesses as the reported case. Done means accesses to a BAR above the current physmem limit work and the illumos NVMe driver can attach.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- rust
- Domain
- operating-systems
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100