oxidecomputer / oxidecomputer/p4

Brief description of P4 architecture that this compiler implements?

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Dominant language
Rust
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12
Avg merge
4d 22h
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Description

Thanks for releasing this! I finally got around to trying it out briefly today, and had some questions about the architecture that is implemented.

I see #include of a core.p4 file in a few files, and softnpu.p4 in some others.

Are the struct fields named port specially recognized by the implementation when they are in structs named ingress_meta or egress_meta somehow? Or that are the 2nd parameter or 3rd parameter of the ingress or egress controls of the SoftNPU package?

I see an action defined as action drop() { } in some code examples, but it is empty. Is the action name drop somehow specially recognized by the compiler? What effects does invoking that action have, if so?

Are there any other architectures besides SoftNpu that x4c supports?

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  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by reading the references to core.p4 and softnpu.p4, then trace how ingress_meta, egress_meta, control parameters, and empty drop actions are handled by x4c. Done means documenting whether these are special cases and listing any other supported architectures, with answers grounded in the implementation.

Written by the indexing model from the issue text.

Assessment

Tech stack
rust
Domain
compilers, documentation
Issue type
Documentation
Difficulty
4/5
Estimated time
3-5 days
Activity status
Quiet
Clarity
Needs clarification
Newbie friendliness
35/100

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