oxidecomputer / oxidecomputer/hubris
Allow for multiple names in memory definitions
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- Dominant language
- Rust
- Stars
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- Forks
- 239
- Avg merge
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- Merged PRs (30d)
- 23
Description
It would be nice if we could specify names = ["a", "b", "stage0"] instead of repeating 3x:
[[sram3]]
name = "a"
address = 0x40102000
size = 0x1000
read = true
write = false
execute = false
[[sram3]]
name = "b"
address = 0x40102000
size = 0x1000
read = true
write = false
execute = false
[[sram3]]
name = "stage0"
address = 0x40102000
size = 0x1000
read = true
write = false
execute = false
(from here)
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the example in chips/lpc55/memory.toml, especially the repeated sram3 definitions linked in the issue. Trace the configuration entry point that reads memory definitions and determine where a names array should be expanded. Done means the array syntax is accepted and produces the same equivalent memory definitions as repeated entries.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- rust
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100