Lower FastNTT kernel

[#458 for reference]
We want to instruction-select a real application, such as the FastNTT kernel. In this issue, I will list the things yet unsupported, and mark them as done as I move forward (thank you @math-fehr for the inspiration). I believe it is unlikely that we'll be able to do _everything_, but this issue shoud help us track and prioritize what we can do.

**Parsing/Printing: LLVM IR**
* [x] `llvm.alloca`
* [x] `llvm.load`
* [x] `llvm.store`
* [x] `llvm.getelementptr`
* [ ] `llvm.func`

**Parsing/Printing: RISCV**
* [x] `riscv.ld` https://github.com/opencompl/veir/pull/497
* [x] `riscv.sd` https://github.com/opencompl/veir/pull/497

**Semantics: LLVM IR**
* [ ] `llvm.alloca`
* [ ] `llvm.load`
* [ ] `llvm.store`
* [ ] `llvm.getelementptr`
* [ ] `llvm.func`

**Semantics / RISCV Instructions**
* [ ] `sd`
* [ ] `sw`
* [ ] `j`
* [ ] `bnez`
* [ ] `lw`
* [ ] `j`
* [ ] `call`
* [ ] `beqz`
* [ ] `bge`

**Instruction Selection Patterns: LLVM IR -> RISC-V**
* [ ] `llvm.alloca`
* [ ] `llvm.load`
* [ ] `llvm.store`
* [ ] `llvm.getelementptr`