microsoft / microsoft/vscode-makefile-tools

[Feature] Recognize C / C++ preprocessor macros (defines) from the makefile.

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enhancement
Dominant language
TypeScript
Stars
242
Forks
78
PR merge metrics
No merged PRs in 30d

Description

Request Overview

Many makefile based project specify a lot of preprocessor macros in the make file, to toggle various options in the code base.

For example,

C_DEFS += \
 '-DDEBUG_EFM=1'

...

override CFLAGS = $(C_FLAGS) $(C_DEFS) $(INCLUDES) $(DEPFLAGS)

...

$(OUTPUT_DIR)/%.o: %.c
	@echo 'Building $<'
	@mkdir -p $(@D)
	$(ECHO)$(CC) $(CFLAGS) -c -o $@ $<

Currently it seems that Visual Studio Code is not aware of any of the macros defined this way, and therefore displays the code wrong. I would like Makefile Tools to recognize these macros and communicate them to the code model.

Additional Information

No response

Contributor guide

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First steps

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Research direction

No source file or test is named. Start by locating the Makefile parsing path and the integration that sends CFLAGS or C_DEFS to the VS Code code model; done means -D macros defined through makefile variables are recognized and reflected in C/C++ IntelliSense.

Written by the indexing model from the issue text.

Assessment

Tech stack
c, cpp, typescript
Domain
tooling
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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