microsoft / microsoft/DirectXShaderCompiler
Incorrect DXIL bitcasts generated for bool matrices in ray payloads
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Since Apr 10, 2024.
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Description
Description
For bool matrices in ray payloads, DXC generates arrays of <n x i1> vectors and assumes an incorrect bit layout for these vectors, casting the <n x i1> vectors to <n x i32> vectors which use a different bit layout.
Bit vectors are always packed and do not respect element alignment, so <n x i1> uses n bits, whereas <n x i32> uses 32n bits.
Steps to Reproduce
HLSL source:
struct MyPayload
{
bool1x2 input;
int output;
};
[shader("callable")]
void OuterCallable(inout MyPayload payload)
{
payload.output = payload.input[0][1];
}
Actual Behavior
Compiling with dxc -T lib_6_6 yields:
target datalayout = "e-m:e-p:32:32-i1:32-i8:32-i16:32-i32:32-i64:64-f16:32-f32:32-f64:64-n8:16:32:64"
target triple = "dxil-ms-dx"
%struct.MyPayload = type { %class.matrix.bool.1.2, i32 }
%class.matrix.bool.1.2 = type { [1 x <2 x i1>] }
; Function Attrs: nounwind
define void @"\01?OuterCallable@@YAXUMyPayload@@@Z"(%struct.MyPayload* noalias nocapture %payload) #0 {
%1 = getelementptr inbounds %struct.MyPayload, %struct.MyPayload* %payload, i32 0, i32 0
%2 = bitcast %class.matrix.bool.1.2* %1 to <2 x i32>*
%3 = load <2 x i32>, <2 x i32>* %2, align 4
%4 = extractelement <2 x i32> %3, i32 1
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = getelementptr inbounds %struct.MyPayload, %struct.MyPayload* %payload, i32 0, i32 1
store i32 %6, i32* %7, align 4, !tbaa !13
ret void
}
The problematic sequence is the following:
%1 = getelementptr inbounds %struct.MyPayload, %struct.MyPayload* %payload, i32 0, i32 0
%2 = bitcast %class.matrix.bool.1.2* %1 to <2 x i32>*
%3 = load <2 x i32>, <2 x i32>* %2, align 4
This assumes 32-bit alignment of the i1 elements within the <2 x i1> vector. The data layout does specify an alignment of 32 bits for i1, but this is irrelevant for elements of vectors, which are always bit-packed, see https://llvm.org/docs/LangRef.html#t-vector.
Note that HLSL bool vectors (instead of matrices) in payloads are replaced by i32 arrays, which avoids this issue. Maybe the same should be done for matrices?
Environment
- DXC version 1.8(dev;4371-fc0ecb83)
- Host Operating System Ubuntu 22.04
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