Ability to disable PCB layers
Nobody has claimed this yet.
- Dominant language
- Python
- Stars
- 63
- Forks
- 4
- PR merge metrics
- No merged PRs in 30d
Description
I'm sensitive to the fact that this issue has already been addressed in #79 but a) time has passed and b) I'm going to frame the request in more general terms: it would be handy to remove arbitrary layers as part of the DNP process.
For me, the issue is the mask layer. What I've found is that JLCPCB's stencil review techs are consistently confused by the presence of closed solder paste apertures that are still opened on the mask layer, leading to significant confusion and multiple review delays.
Unfortunately, language and/or comprehension issues seem to make my attempts to describe how variant systems result in multiple, slightly different stencils for a single PCB. It appears to break their brains and there might be some recent frustrations motivating this issue. 🥲
It's difficult to explain mutually exclusive placing when they basically are looking for a black or white "close all of the holes" vs "open all of the holes" reply.
From what I understand, your position was that this should be a KiCAD feature and that you were hesitant to implement new features while the SWIG transition was still vague. Given that I'm now seeing deprecation warnings in v10, I hope that the new API has been finalized.
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing issue #79 and the repository's current KiCad integration, particularly the transition from SWIG to the finalized API. The work is done when arbitrary PCB layers, especially the mask layer, can be removed during the DNP process without disrupting variant handling.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- python
- Domain
- design
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100