lowRISC / lowRISC/sonata-system

TL-UL: bus watchdog

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question
Dominant language
C++
Stars
54
Forks
37
PR merge metrics
No merged PRs in 30d

Description

Will there be some kind of bus watchdog to catch invalid accesses or lock ups (missing 'heart beat' signal)? I think this is an important development aid, but it could also be configured to restart the system in the event of a violation being caught and reported by CHERI... rather than just leaving the demo 'IoT system' in a dead state.

Question from @alees24 copied from: https://github.com/lowRISC/sonata-system/pull/1#issuecomment-1830495233

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  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
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Research direction

Start by reviewing the bus-watchdog discussion in pull request #1 and the CHERI violation-reporting context mentioned in this issue. Define whether the system should detect invalid accesses and missing heartbeats, and whether a violation should report, restart the system, or both.

Written by the indexing model from the issue text.

Assessment

Tech stack
cpp
Domain
embedded-iot
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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