Enable 8-bit and 16-bit memory accesses via the SBA interface to the debug module

Nobody has claimed this yet.

Today the `sbaccess16` and `sbaccess8` fields in the debug module's `sbcs` register are fixed to 0: https://github.com/lowRISC/sonata-system/blob/5683774c60883e7a98883a5a8d98e2c75da09eee/vendor/cheriot_debug_module/src/dm_csrs.sv#L525

This prevents memory reads and writes of smaller that 32 bits from being completed using the SBA interface, and particularly blocks the ability to implement software breakpoints, as that requires reading/writing 16 bit instructions. While hardware supported breakpoints are available, they are limited in quantity, so we would like to verify that software breakpoints work as an alternative.

Is it possible to enable these smaller SBA access sizes?

Start in vendor/cheriot_debug_module/src/dm_csrs.sv around line 525, where sbaccess16 and sbaccess8 are fixed. Trace the SBA access-size handling and determine whether 8-bit and 16-bit reads and writes can be supported. Done means smaller SBA accesses complete and software breakpoints using 16-bit instructions can be verified.

Written by the indexing model from the issue text.