lowRISC / lowRISC/sonata-system
IP to suspend/reset on both FPGA and sim
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- Dominant language
- C++
- Stars
- 54
- Forks
- 37
- PR merge metrics
- No merged PRs in 30d
Description
> As discussed in person, and annotated here just for future consideration....a simple register/IP block on the Sonata bus that provided power down/suspend/reset on a physical system (we still have a requirement for a reset block) could also provide shutdown in simulation more elegantly.
_Originally posted by @alees24 in https://github.com/lowRISC/sonata-system/issues/368#issuecomment-2532715013_
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing issue 368 and its linked discussion, then inspect the Sonata bus and the existing physical reset-block requirements. Define the scope for an IP block that supports power down, suspend, and reset on hardware while also providing simulation shutdown; completion would require agreement on that design and its implementation.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100