RISC-V ISA for E mode
Open
Nobody has claimed this yet.
- Dominant language
- Shell
- Stars
- 277
- Forks
- 55
- PR merge metrics
- No merged PRs in 30d
Description
When using the llvm compiler for RISC-V E mode, there is no support. wish there could be some support on this format for future usage.
Is there any plan on supporting or developing in current state?
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing the repository's existing LLVM and Clang RISC-V support to determine how the E mode ISA is represented. The issue does not name files, tests, or an implementation scope; done would require an agreed plan for supporting RISC-V E mode and validation of that support.
Written by the indexing model from the issue text.
Assessment
- Domain
- compilers
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100