Compressed ('C') instruction set MC-layer support
Open
Nobody has claimed this yet.
arch-support
easy
llvm
- Dominant language
- Shell
- Stars
- 277
- Forks
- 55
- PR merge metrics
- No merged PRs in 30d
Description
This should be relatively mechanical. Some new fixup+relocation types will be needed, and the diasassembler must be taught to disassemble variable-length RISC-V instructions.
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by locating the MC-layer fixup and relocation definitions and the disassembler entry point in this LLVM RISC-V project. Trace how existing instructions are handled, then verify that compressed instructions and variable-length RISC-V instructions are supported in both areas; the issue names no tests or files to run.
Written by the indexing model from the issue text.
Assessment
- Domain
- compilers, tooling
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 25/100