lowRISC / lowRISC/opentitan

[prim_{alert_receiver|dom_2_share}] Assertion memory footprint warnings

Open
#8,583 3 comments 0 reactions 0 assignees View on GitHub
Component:DV Component:RTL Earlgrey-PROD Candidate Priority:P2 Type:Cleanup
Dominant language
SystemVerilog
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Description

Noticed these when running chip simulations:
```

Warning-[SVA-OPTCOV-LMFA] Large memory footprint assertion
../src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv, 335
The assertion 'InBandInitSequence_A' has the potential to consume a large
amount of memory.
Please examine the assertion for the use of large or unbounded delays and
repetitions.

Warning-[SVA-OPTCOV-LMFA] Large memory footprint assertion
../src/lowrisc_prim_prim_dom_and_2share_0.1/rtl/prim_dom_and_2share.sv, 106
The assertion 'UnmaskedAndMatched_A' has the potential to consume a large
amount of memory.
Please examine the assertion for the use of large or unbounded delays and
repetitions.
```

Contributor guide

Open the contributing guide

Research direction

Start with the assertions named InBandInitSequence_A in src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv:335 and UnmaskedAndMatched_A in src/lowrisc_prim_prim_dom_and_2share_0.1/rtl/prim_dom_and_2share.sv:106. Reproduce the chip-simulation warnings, inspect the cited assertions and their delays or repetitions, and verify that the large-memory-footprint warnings are addressed.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot, testing-qa
Issue type
Bug
Difficulty
3/5
Estimated time
1-2 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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