[otbn,dv] Cover all points in insn_jal_cg and insn_jalr_cg
Open
Component:DV
Earlgrey-PROD Candidate
IP:otbn
Milestone:V3
Priority:P4
Type:Enhancement
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
Lots of these are quite similar, to do with generating valid or invalid addresses in various ways.
> estimate 4
Contributor guide
Research direction
Start by locating the DV definitions of insn_jal_cg and insn_jalr_cg and reviewing their existing coverage points and similar instruction coverage. Determine how valid and invalid address cases are generated, then confirm that all points are exercised by the relevant simulation coverage results.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing-qa
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100