[otbn,dv] We struggle to hit flags_11_cross in enc_bnai_cg
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
This means that we rarely generate `bn.addi` or `bn.subi` instructions that set the carry flag. With 500 seeds, you might expect to get either `bn.addi` or `bn.subi`, but not both.
Teach the RIG to generate that sort of thing a bit more often. Since this comes from `StraightLineInsn`, maybe it's enough to make sure we have lots of WDRs around that are almost `'1` (so that you don't have to add too much to push them over the line).
> estimate 4
Contributor guide
Research direction
Start with the enc_bnai_cg coverage target and trace how StraightLineInsn and the RIG generate bn.addi and bn.subi operands. Investigate whether generating WDR values near '1 improves flags_11_cross, then validate the change against the existing 500-seed coverage behavior; done means both carry-setting instruction cases occur more reliably.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing-qa
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 38/100