[prim_fifo_async] Unifying prim_fifo_async and prim_fifo_async_sram_adapter

This issue is a follow-up of #7678 . The `prim_fifo_async_sram_adapter` module in the PR #7678 has a common logic (managing pointers) that is used in `prim_fifo_async`. This issue is to suggest changes:

- [ ] Create a submodule to manage pointers and instantiate the module in both FIFO Async primitives.
- [ ] Use `prim_fifo_async_sram_adapter` inside the `prim_fifo_async` for the DPSRAM FIFO implementation.

CC: @tjaychen @msfschaffner

Start by reading the prim_fifo_async and prim_fifo_async_sram_adapter modules and the related changes in PR #7678. Identify the shared pointer-management logic and how the DPSRAM FIFO implementation is selected. Done means both FIFO primitives use a common pointer submodule and prim_fifo_async uses prim_fifo_async_sram_adapter for DPSRAM.

Written by the indexing model from the issue text.