[ralgen] enable parameterization/templatization of register specifications

It would be nice in the `.hjson` to be able to parameterize the number of items in a memory, etc...

SRAM testbench verifies 2 different sizes of memories, and not having a good way of creating a auto-generating a variable size RAL memory creates a lot of extra overhead for supporting this RAL model in the testbench.

Start by locating ralgen and the register-specification .hjson files, then compare the SRAM testbench's two memory sizes. Done means a parameterized specification can generate RAL memories for both sizes without duplicating the model.

Written by the indexing model from the issue text.