[tracking] Provide support for multiple FPGA toplevels

Nobody has claimed this yet.

We currently focus our FPGA testing on the Nexys Video board, which is already today too small to fit all of top_earlgrey and is only kept alive due to some hacky magic which reduces the flash and ram sizes; we effectively run a slightly modified top_earlgrey* toplevel on our Nexys Video FPGA. We also support the CW305 board through top_englishbreakfast, a stripped-down version of top_earlgrey for SCA testing, through similar, but different hacks. Moving forward, we need to support a third FPGA board which is large enough to fit the OpenTitan top_earlgrey design for real. Let's call this NEWFPGAv1 for now. This issue is about providing proper support for the different FPGA boards, and with it, for different toplevels.

Not all boards and toplevels need to be supported to the same (quality) level, but since we have valid use cases for each of them we need to support them good enough for the specific use case at least.

The *current thinking* of where we would end up with is the following:

FPGA board
toplevel name
description

Nexys Video
top_NAMETBD
Widely deployed board, used for software development (e.g. Tock). Can fit many functional OpenTitan, but not all of its memories and hardening features.

CW305
top_englishbreakfast
Side channel analysis. It may be superseded by the newer FPGA board in the future, but not for another couple of months.

NEWFPGAv1 (edit: CW310)
top_earlgrey
A FPGA version of the full OpenTitan design.

**This is a tracking issue to provide an overview of the necessary steps to get us towards supporting more than one toplevel with different configurations in OpenTitan in a way that is reasonably robust and maintainable. Please follow up in the sub-issues as necessary.**

* [ ] Produce a development bootloader which can be customized for different toplevels: https://github.com/lowRISC/opentitan/issues/5393
* [ ] Produce a new toplevel for Nexys Video: https://github.com/lowRISC/opentitan/issues/5396
* [ ] Write at least a single software smoke test that runs on the Nexys Video-specific toplevel.
* [ ] Write a system test using top_NAMETBD on the Nexys Video board and run it in CI.
* [x] Make a Xilinx Vivado license available to the CI runners to perform synthesis for the NEWFPGAv1 board
* [x] Switch top_earlgrey to NEWFPGAv1 https://github.com/lowRISC/opentitan/issues/5388, see #6614
* [x] Hook up the NEWFPGAv1 board to the FPGA runner, and enable running tests on it. See #6614

Start by reviewing the linked sub-issues 5393 and 5396, then inspect the unchecked Nexys Video smoke-test and CI system-test items. Treat the checklist as the completion criteria: customizable bootloader and toplevel support, a Nexys Video smoke test, and a CI-run system test, while preserving the completed NEWFPGAv1 work.

Written by the indexing model from the issue text.