[dvsim] Rename {eval_cmd} to something that doesn't look like a variable substitution
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- SystemVerilog
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Description
The text substitution engine in dvsim (which boils down to a function called `subst_wildcards` in `util.py`) expands things like `{foo}` to the value of a variable called `foo`. To allow more complicated expressions (either fiddling with the environment, or using something like awk!) you can call out to the shell with things like `{eval_cmd} python3 -c 'print({a} + {b})'`. Here, `{eval_cmd}` isn't an expanded variable but is instead an instruction to the substitution engine to run the command that follows it and evaluate to the result.
We should probably change the syntax a bit so that it doesn't look like a variable substitution any more. Maybe `{!eval_cmd}` (to keep everything parsed by `subst_wildcards` in braces)? Something else?
See [here](https://github.com/lowRISC/opentitan/pull/3345#discussion_r506717219) for the discussion that prompted the issue.
Contributor guide
Research direction
Start with subst_wildcards in util.py and review the linked discussion in pull request 3345. Decide on syntax that distinguishes shell-evaluation instructions from variable substitutions, then trace its callers to identify affected examples or tests; done means the new syntax is consistently recognized without looking like a variable substitution.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- python, shell
- Domain
- tooling
- Issue type
- Refactor
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 30/100